- load instruction
- команда загрузки
English-Russian electronics dictionary .
load instruction
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Instruction pipeline — Pipelining redirects here. For HTTP pipelining, see HTTP pipelining. Basic five stage pipeline in a RISC machine (IF = Instruction Fetch, ID = Instruction Decode, EX = Execute, MEM = Memory access, WB = Register write back). In the fourth clock… … Wikipedia
Instruction set — An instruction set, or instruction set architecture (ISA), is the part of the computer architecture related to programming, including the native data types, instructions, registers, addressing modes, memory architecture, interrupt and exception… … Wikipedia
Instruction set simulator — An instruction set simulator (ISS) is a simulation model, usually coded in a high level programming language, which mimics the behavior of a mainframe or microprocessor by reading instructions and maintaining internal variables which represent… … Wikipedia
Load Task Register — The LTR x86 instruction stands for Load Task Register and is used in operating systems that support multitasking. LTR is supported only in protected mode and long mode, not in real mode or virtual 8086 mode. It must be executed when the CPL is 0 … Wikipedia
Instruction set — Der Befehlssatz (englisch: instruction set, weshalb in der deutschen Sprache der Begriff Instruktion synonym für Befehl verwendet wird) bezeichnet in der Informatik die Menge der Maschinenbefehle eines Mikroprozessors. Der Umfang des… … Deutsch Wikipedia
Load/Store-Architektur — Eine Load/Store Architektur ist eine Computerarchitektur, deren Befehlssatz Daten Speicherzugriffe ausschließlich mit speziellen Lade (Load) und Speicher (Store) Befehlen erlaubt. Sie wird auch als Register Register Architektur bezeichnet. RISC… … Deutsch Wikipedia
Explicitly parallel instruction computing — (EPIC) is a term coined in 1997 by the HP Intel alliance [cite web url = http://www.hpl.hp.com/techreports/1999/HPL 1999 111.pdf title = EPIC: An Architecture for Instruction Level Parallel Processors accessdate = 2008 05 08 last = Schlansker and … Wikipedia
Cognitive load — The term cognitive load is used in cognitive psychology to illustrate the load related to the executive control of working memory (WM). Theories contend that during complex learning activities the amount of information and interactions that must… … Wikipedia
Reduced instruction set computer — The acronym RISC (pronounced risk ), for reduced instruction set computing, represents a CPU design strategy emphasizing the insight that simplified instructions which do less may still provide for higher performance if this simplicity can be… … Wikipedia
Explicitly Parallel Instruction Computing — EPIC bezeichnet eine Eigenschaft einer Befehlssatzarchitektur (englisch Instruction Set Architecture, kurz ISA) und der Verarbeitungsstruktur einer Familie von Mikroprozessoren, z. B. Itanium. Bei der Programmierung von EPIC CPUs wird… … Deutsch Wikipedia
Complex instruction set computing — A complex instruction set computer (CISC) ( /ˈsɪs … Wikipedia
